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TSEK11 - Utvärdering av integrerade kretsar
Course Description
This course is a follow-up to TSEK06 VLSI Design Project and gives the students a possibility to test and evaluate their chip designs.
Required Background
The student must have attended TSEK06 VLSI Design Project and sent a chip for fabrication.
Examination
The only grades given are fail and pass. These will be based on both the evaluation effort and a written report that describes the evaluation and the outcome of it. Also a short presentation of the measurment is required.
The report should be handed in to the supervisors by the end of the course. The exact date will be posted on this page later.
Staff
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Instructor Atila Alvandpour, Professor Electronic Devices, Department of Electrical Engineering (ISY) Office 3D:523, B-huset Tel: 013-285818 E-mail: atila@isy.liu.se
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Head Teaching Assistant Martin Nielsen-Lönn, Ph.D. Student Electronic Devices, Department of Electrical Engineering (ISY) Office 3D:535, B-huset E-mail: martin.nielsen.lonn@liu.se
Chip photos 2016
Chip 1 - group 1, 2, 4, 5
Chip 1 - group 1, 2, 4, 5
PCB information
You can find the PCB schematic, layout, and bonding diagram under course material here on the website or in the folder /site/edu/eks/TSEK11/2017/pub/ on ISY servers.
Schematic Chip 1 - Group 2, 3, 4, and 6
Layout Chip 1 - Group 2, 3, 4, and 6
Bonding Diagram Chip 1 - Group 2, 3, 4, and 6